The working principle of the logic pen circuit (three simple logic pen circuit schematics)

The logic pen is an instrument that uses different color indicators to indicate the level of the digital level. It is a relatively simple tool for measuring digital circuits. Using a logic pen to quickly measure a faulty chip in a digital circuit. Generally there are two or three signal indicators, the red light generally indicates a high level, the green light generally indicates a low level, and the yellow light indicates that the measured signal is a pulse signal.

This article mainly introduces the working principle of the three logic pen circuits, and follows the small series to understand.

Cheap and reliable logic pen circuit works

In digital circuits, there are three logic states: "1" (high), "0" (low), and "floating" (high-impedance), which is what is commonly called tri-state logic. The logic pen is the logic state of the measured point through the LED or digital tube, and is an indispensable tool for digital circuit fabrication, maintenance and testing.

The circuit principle is shown in the figure below. U1 and U2 in the figure are two four-two NAND gate circuits, namely U1A~U1D, U2A~U2D in Fig. 1.

The circuit is mainly composed of power polarity protection, test probe, logic transformation, pulse broadening and logic display. In the figure, fuses F1 and D5 are power polarity protection circuits. When the power supply is reversed, F1 is blown and the power is turned off to protect the circuit from being burned out. P1 is a test probe for inputting the logic signal of the test point; U1A, U1B, U2A, T1, U1D, U1C, etc. constitute a logic conversion circuit; U2A, U2B, C1, R6 and U1C, U2C, C2, R7 constitute two pulses Spreading the circuit; LED1 is low level display, LED2 is high level display.

When P1 detects low level, that is, P1=0, then after the following logic transformation, since the 4-pin input of U is high, the output of the 6-pin of U is dependent on the input of 5-pin of U1B. The resulting 6-pin output logic of U is temporarily uncertain. Similarly, U1C's 8-pin output logic is temporarily undetermined.

Since the two inputs of U2C are grounded through resistor R7, the input logic of U2C is low and the output is high. That is, the logic state of the 5 pin of U1B and the pin 10 of U1C is high. Similarly, the U2A-2 pin is also a high level input. Therefore, if U1B-6=0 and U1C-8=0, continue the above logic transformation to: U1B-6=0→U2A-1=0→U2A-3=1→LED1 illuminates, indicating that the current logic state is low U1C-8=0→LED2 is off. Similarly, when P1 is detected as high level, after corresponding logic transformation, LED2 will emit a light indication, and LED1 will be extinguished.

When P1 detects a high and low level (ie, a low frequency pulse signal) of a low speed change, LED1 and LED2 will alternately emit light. However, as the level change speed increases, the alternating light-emitting speed of LED1 and LED2 will also accelerate, which makes the human eye unable to distinguish at all, that is, the LED1 and LED2 are always bright. Therefore, a pulse broadening portion is added to the circuit, that is, a plurality of narrow pulse width input pulses are converted into a wide pulse output by the principle that the voltage across the capacitor in the RC circuit cannot be abruptly changed. When the pulse stretching circuit is added, when the high frequency pulse (such as the computer clock signal) is tested, the alternate speed of LED1 and LED2 will be reduced to a speed that can be distinguished by the human eye, and the purpose of testing the high frequency pulse signal with the logic pen is achieved. .

Simple and practical frequency logic pen works

The circuit is shown below. It consists of four two-output NAND gates and one transistor, and uses a piezoelectric ceramic buzzer to sound, and judges the measured logic state according to the tone.

Circuit principle: In the circuit, the NAND gates ICB, R3, and Cl form a “0” oscillator, and the NAND gates ICC, R4, and C2 form a “1” oscillator. When R3, Cl, or R4 and C2 have different values, the oscillator The frequency is also different. The 5 pin of ICB and the 7 pin of ICC are the control terminals. When the high level is "1", the oscillator works and outputs a rectangular wave. The detection status of the logic pen is:

(1) When the probe T is not detected or a "floating" state is detected, I. The CA outputs "0" (it is generally considered that the input is "1" when the logic gate input is open). At the same time VT cutoff, ICC pin 7 is pulled down to "0" by R2, "0" oscillator and "l" oscillator are stopped, ICD has no output, buzzer HTD does not sound:

(2) When the probe T detects "0", VT is turned off, the 7th pin of the ICC is "0", and the "l" oscillator does not operate. At the same time, the "0" signal is inverted by ICA, so that the 5 pin of ICB is "1", and the "0" oscillator starts to generate a rectangular wave oscillating signal with a lower frequency (suitable from 200 Hz to 600 Hz), which is driven by ICD. The HTD emits a low frequency sound;

(3) When the probe T detects "1" time, the IC pin 5 is "0" through the ICA inversion, and the "0" oscillator does not work. At this time, the VT is turned on, and the ICC pin 7 is "1". The "1" oscillator starts. An oscillating signal of 1000 Hz to 1500 Hz is preferred, and the HTD is driven by the ICD to emit a high frequency sound:

(4) When the probe T detects the "CP" pulse, it is equivalent to "0", "1" alternate input, "0" oscillator and "l" oscillator take turns output, HTD produces high and low frequency mixing ring.

Component selection: ICA ~ ICD selects the two-input NAND integrated circuit CD4093 with Schmitt trigger, which contains four two-input NAND gates, so it can meet the requirements. VT selects 3DC8D, takes B=80~120, HTD uses 27A-1 type piezoelectric buzzer, the +5V and GND in the figure are connected to the power and ground of the circuit under test.

How does the mini logic pen circuit work?

The circuit is shown as a Schmitt trigger. When the probe is suspended, the red and green LEDs VD1 and VD2 are illuminated after the power switch SA is closed. When the probe touches the circuit under test whose logic level is "1", the 3 pin of the IC outputs a low level, VDl is still illuminated, and VD2 is extinguished; when the logic level detected by the probe is "0" When the IC's 3-pin output is high, VD2 is lit and VD1 is off. When the probe is exposed to a continuously varying pulse signal, VD1, VD2 will be alternately illuminated.